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1 white electronic designs corporation ? (602) 437-1520 ? www.whiteedc.com white electronic designs srv01-srv04 february 2007 rev. 2 general description the wedc sram series (srv) memory cards offer a high performance nonvolatile storage solution for code and data storage, disk caching, and write intensive mobile and embedded applications. packaged in pcmcia type i or type ii housing (type ii for cards with extended battery backup time and 8mb cards), the wedc sram srv series is based on 1 or 4mbit sram memories, providing densities from 256 kilobytes to 8 megabytes. the srv series of sram memory cards is a universal 3v/ 5v power supply and operates at speeds as high as 150ns. the cards are based on advanced cmos technology providing very low power and reliable data retention characteristics. wedc?s sram cards contain a rechargeable lithium battery and recharge circuitry, eliminating the need for replaceable batteries found in many sram cards. wedc?s standard cards are shipped with wedc?s sram logo. cards are also available with blank housings (no logo). the blank housings are available in both a recessed (for label) and at housing. please contact wedc sales representative for further information on custom artwork. features ? high performance sram memory card ? universal 3.3 to 5 volt supply allows for wider compatibility between systems. ? fast access times: 150ns @ 5v 250ns @ 3.3v ? x8/x16 pcmcia standard interface ? low power cmos technology provides very low power and reliable data retention characteristics ? standby current < 100 a typical ? rechargeable lithium battery with recharge circuitry ? eliminates the need for replaceable batteries ? standby current during recharge typically < 2ma ? battery backup time ? 7 months - type i card ? 18 months - type ii card typical based on 4mb (lower densities will have greater storage times) ? unlimited write cycles, no endurance issues ? optional features: ? 2kb eeprom attribute memory containing cis ? optional hardware write protect switch ? pc card standard type i or type ii form factor pcmcia sram memory card ? srv series sram memory card 256kb through 8mb
2 white electronic designs corporation ? (602) 437-1520 ? www.whiteedc.com white electronic designs srv01-srv04 february 2007 rev. 2 block diagram 4mb sram card shown + decoder and control logic address buffer [a1..a19] csli# cshi# cshi# [do..d7] [d8..d15] write prot switch s1 wp vcc [a20..a22] attribute memory ce1# ce2# we# oe# reg# ++ + cs-a# cs-a# rd# rd# rd# wr# wr# wr# ctrl ctrl a0 power management and battery control lithium bat. to internal power supply vcc bvd1 bvd2 gnd vs1 vs2 [d8..d15] [do..d7] i/o buffer sram 512k x 8 [a1..a11] nc nc + 2. pull up resistor (min 10k) notes: 1. pull down resistor (min 100k) + + sram 512k x 8 sram 512k x 8 sram 512k x 8 sram 512k x 8 sram 512k x 8 sram 512k x 8 sram 512k x 8
3 white electronic designs corporation ? (602) 437-1520 ? www.whiteedc.com white electronic designs srv01-srv04 february 2007 rev. 2 pinout pin signal name i/o function active 35 gnd ground 36 cd1# o card detect 1 low 37 dq11 i/o data bit 11 38 dq12 i/o data bit 12 39 dq13 i/o data bit 13 40 dq14 i/o data bit 14 41 dq15 i data bit 15 42 ce2# i card enable 2 low 43 vs1 o voltage sense 1 n.c. 44 n.c. 45 n.c. 46 a17 i address bit 17 256kb(2) 47 a18 i address bit 18 512kb(2) 48 a19 i address bit 19 1mb(2) 49 a20 i address bit 20 2mb(2) 50 a21 i address bit 21 4mb(2) 51 vcc supply voltage 52 vpp2 prog. voltage n.c. 53 a22 address bit 22 8mb(2,4) 54 a23 n.c. 55 a24 n.c. 56 a25 n.c. 57 vs2 o voltage sense 2 n.c. 58 n.c. 59 wait# o extended bus cycle low 60 n.c. 61 reg# i attrib mem select low 62 bvd2 o bat. volt. detect 2 63 bvd1 o bat. volt. detect 1 (3) 64 dq8 i/o data bit 8 65 dq9 i/o data bit 9 66 dq10 o data bit 10 67 cd2# o card detect 2 low 68 gnd ground pin signal name i/o function active 1 gnd ground 2 dq3 i/o data bit 3 3 dq4 i/o data bit 4 4 dq5 i/o data bit 5 5 dq6 i/o data bit 6 6 dq7 i/o data bit 7 7 ce1# i card enable 1 low 8 a10 i address bit 10 9 oe# i output enable low 10 a11 i address bit 11 11 a9 i address bit 9 12 a8 i address bit 8 13 a13 i address bit 13 14 a14 i address bit 14 15 we# i write enable low 16 rdy/bsy# o ready/busy n.c. 17 vcc supply voltage 18 vppl prog. voltage n.c. 19 a16 i address bit 16 20 a15 i address bit 15 21 a12 i address bit 12 22 a7 i address bit 7 23 a6 i address bit 6 24 a5 i address bit 5 25 a4 i address bit 4 26 a3 i address bit 3 27 a2 i address bit 2 28 a1 i address bit 1 29 a0 i address bit 0 30 dq0 i/o data bit 0 31 dq1 i/o data bit 1 32 dq2 i/o data bit 2 33 wp o write potect high 34 gnd ground notes: 1. cd1# and cd2# are grounded internal to pc card. 2. shows density for which speci ed address bit is msb. higher order address bits are no connects (i.e., 1mb a19 is msb, a20 - a21 are nc). 3. bvd1 is an open drain output with a 10k ohm internal pull-up resistor. 4. address bit 22 is used for the 8mb cards as well as the 6mb cards.
4 white electronic designs corporation ? (602) 437-1520 ? www.whiteedc.com white electronic designs srv01-srv04 february 2007 rev. 2 package dimensions 10.0mm min (0.400?) 1.0mm 0.05 (0.039?) 1.0mm 0.05 (0.039?) 54.0mm 0.10 (2.126?) 54.0mm 0.10 (2.126?) 5.0mm t1 (0.197?) 3.3mm t1 (0.130?) 1.6mm 0.05 (0.063?) 1.6mm 0.05 (0.063?) 1.0mm 0.05 (0.039?) 1.0mm 0.05 (0.039?) 85.6mm 0.20 (3.370?) 85.6mm 0.20 (3.370?) t1=0.10mm interconnect area t1=0.20mm substrate area interconnect area 10.0mm min (0.400?) 3.0mm min 3.0mm min substrate area 10.0mm min 0.400? substrate area interconnect area type ii type i
5 white electronic designs corporation ? (602) 437-1520 ? www.whiteedc.com white electronic designs srv01-srv04 february 2007 rev. 2 card signal description symbol type name and function a0 - a25 input address inputs: a0 through a25 enable direct addressing of up to 64mb of memory on the card. signal a0 is not used in word access mode. a25 is the most signi cant bit. (address pins used are based on card density,see pinout for highest used address pin) dq0 - dq15 input/output data input/output: dq0 through dq15 constitute the bi-directional databus. dq0 - dq7 constitute the lower (even) byte and dq8 - dq15 the upper (odd) byte. dq15 is the msb. ce1#, ce2# input card enable 1 and 2: ce1# enables even byte accesses, ce2# enables odd byte accesses. multiplexing a0, ce1# and ce2# allows 8-bit hosts to access all data on dq0 - dq7. oe# input output enable: active low signal enabling read data from the memory card. we# input write enable: active low signal gating write data to the memory card. rdy/bsy# output ready/busy output: not used for sram cards cd1#, cd2# output card detect 1 and 2: provide card insertion detection. these signals are connected to ground internally on the memory card. the host socket interface circuitry shall supply 10k-ohm or larger pull-up resistors on these signal pins. wp output write protect: follows hardware write protect switch. when switch is placed in on position, signal is pulled high (10k ohm). when switch is off signal is pulled low. vpp1, vpp2 n.c. program/erase power supply: not used for sram cards. v cc card power supply: 5.0v for all internal circuitry. gnd ground: for all internal circuitry. reg# input attribute memory select: only used with cards built with optional attribute memory. rst input reset: not used for sram cards wait# output wait: this signal is pulled high internally for compatibility. no wait states are generated. bvd1, bvd2 output battery voltage detect: provides status of battery voltage. bvd2 = bvd1 = v oh (battery voltage is guaranteed to retain data) bvd2 = v ol , bvd1 = voh (data is valid, battery recharge required) bvd2 = bvd1 = v ol (data may no longer be valid, battery requires extended recharge) vs1, vs2 output voltage sense: noti es the host socket of the card?s vcc requirements. vs1 and vs2 are open to indicate a 5v, 16 bit card has been inserted. rfu reserved for future use n.c. no internal connection to card: pin may be driven or left oating sram functional truth table read function common memory attribute memory function mode ce2# ce1# a0 oe# we# reg# d15-d8 d7-d0 reg# d15-d8 d7-d0 standby mode h h x x x x high-z high-z x high-z high-z byte access (8 bits) h l l l h h high-z even-byte l high-z even-byte h l h l h h high-z odd-byte l high-z not valid word access (16 bits) l l x l h h odd-byte even-byte l not valid even-byte odd-byte only access l h x l h h odd-byte high-z l not valid high-z write function standby mode h h x x x x x x x x x byte access (8 bits) h l l h l h x even-byte l x even-byte h l h h l h x odd-byte l x x
6 white electronic designs corporation ? (602) 437-1520 ? www.whiteedc.com white electronic designs srv01-srv04 february 2007 rev. 2 absolute maximum ratings 2 operating temperature t a (ambient) commercial 0c to +60 c industrial -40c to +85 c storage temperature commercial 0c to +60 c industrial -40c to +85 c voltage on any pin relative to v ss -0.5v to v cc +0.5v (1) v cc supply voltage relative to v ss -0.5v to +7.0v notes: 1. during transitions, inputs may undershoot to -2.0v or overshoot to v cc +2.0v for periods less than 20ns. 2. stress greater than those listed under ?absolute maximum ratings? may cause permanent damage to the device. this is a stress rating only and functional operation at these or any other conditions greater than those indicated in the operational sections of this speci cation is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. dc characteristics 1 cmos test conditions: v il = v ss 0.2v, v ih = v cc 0.2v sym parameter density notes min typ(3) max units test conditions i cc v cc active current 64kb 1 90 180 ma v cc = 5.25v tcycle = 150ns 128kb 90 180 256kb 90 180 512kb 90 180 1mb to 8mb 110 190 i ccs v cc standby current all 2,4 < 0.1 < 1 10 ma v cc = 5.25v control signals = v cc i li input leakage current all 5,6 20 av cc = v cc max v in =v cc or vss i lo output leakage current all 6 20 av cc = v cc max v out =v cc or v ss v il input low voltage all 6 0 0.8 v v ih input high voltage all 6 3.85 v cc +0.5 v v ol output low voltage all 6 0.4 v i ol = 3.2ma v oh output high voltage all 6 v cc - 0.4 v cc vi oh = -2.0ma notes: 1. all currents are for x16 mode and are rms values unless otherwise speci ed. 2. control signals: ce1#, ce2#, oe#, we#, reg#. 3. typical: v cc = 5v, t = +25c. 4. iccs includes battery recharge current. value depends on battery discharge level. i ccs min is speci ed for fully charged battery. i ccs typical value is speci ed for battery discharge to 2.7v. i ccs max is speci ed for a fully discharged battery (0v). battery will recharge to 1.5v in 20 sec. 5. values are the same for byte and word wide modes for all card densities. 6. exceptions: leakage currents on ce1#, ce2#, oe#, reg# and we# will be < 500 a when v in = gnd due to internal pull-up resistors battery characteristics sra11-14 sra01-04 parameter density notes type i type i type ii units conditions battery life all (1) min 10 min 10 years normal operation, t=25c battery backup time 256kb (2) - 24 60 months (typical) t=25c 512kb, 1mb 32 18 45 battery backup time is a calculated value and is not guaranteed. this should not be used to schedule battery recharging. 2mb 22 12 30 4mb 12 7 17 6mb 12 7 17 8mb - - 12 notes: 1. battery life refers to functional lifetime of battery. 2. battery backup time is density and temperature dependent.
7 white electronic designs corporation ? (602) 437-1520 ? www.whiteedc.com white electronic designs srv01-srv04 february 2007 rev. 2 ac characteristics read timing parameters 5.0v 3.3v sym (pcmcia) parameter min max min max unit t rc read cycle time 150 250 ns t a (a) address access time 150 250 ns t a (ce) card enable access time 150 250 ns t a (oe) output enable access time 75 125 ns t su (a) address setup time 20 30 ns t su (ce) card enable setup time 0 0 ns t h (a) address hold time 20 20 ns t h (ce) card enable hold time 20 20 ns t v (a) output hold from address change 0 0 ns t dis (ce) output disable time from ce# 75 100 ns t dis (oe) output disable time from oe# 75 100 ns t dis (ce) output enable time from ce# 5 5 ns t dis (ce) output enable time from oe# 5 5 ns note: ac timing diagrams and characteristics are guaranteed to meet or exceed pcmcia 2.1 speci cations. read timing diagram note: signal may be high or low in this area. note 1 note 1 a [25::0], reg# ce1#, ce2# oe# d[15::0] tc(r) ta(a) th(a) tv(a) ta(ce) tsu(ce) th(ce) ten(oe) ta(oe) tsu(a) data valid tdis(ce) tdis(oe)
8 white electronic designs corporation ? (602) 437-1520 ? www.whiteedc.com white electronic designs srv01-srv04 february 2007 rev. 2 ac characteristics write timing parameters 5.0v 3.3v sym (pcmcia) parameter min max min max unit tcw write cycle time 150 250 ns tw(we) write pulse width 80 150 ns tsu(a) address setup time 20 30 ns tsu(a-weh) address setup time for we# 100 180 ns tsu(ce-weh) card enable setup time for we# 100 180 ns tsu(d-weh) data setup time for we# 50 80 ns th(d) data hold time 20 30 ns trec(we) write recover time 20 30 ns tdis(we) output disable time from we# 75 100 ns tdis(oe) output disable time from oe# 75 100 ns ten(we) output enable time from we# 5 5 ns tdis(oe) output enable time from oe# 5 5 ns tsu(oe-we) output enable setup from we# 10 10 ns th(oe-we) output enable hold from we# 10 10 ns tsu(ce) card enable setup time from oe# 0 0 ns th(ce) card enable hold time 20 20 ns note: ac timing diagrams and characteristics are guaranteed to meet or exceed pcmcia 2.1 speci cations. write timing diagram note: 1. signal may be high or low in this area. 2. when the data i/o pins are in the output state, no signals shall be applied to the data pins (d15 -d0) by the host system. th(oe-we) note 1 ce1#, ce2# note 1 tsu(ce-weh) tc(w) a [25::0], reg# tw(we) tdis(we) th(d) d[15::0](din) data input tsu(a) tsu(a-weh) oe# tsu(ce) tsu(d-weh) trec(we) th(ce) tsu(oe-we) tdis(oe) d[15::0](dout) ten(oe) ten(we) note 2 note 2 we#
9 white electronic designs corporation ? (602) 437-1520 ? www.whiteedc.com white electronic designs srv01-srv04 february 2007 rev. 2 wed 8p512srv0100c15 c995 9915 product marking note: some products are currently marked with our pre-merger company name/ acronym (edi). during our transition period, some products will also be marked with our new company name/acronym (wed). starting october 2001 all pcmcia products will be marked only with the wed pre x. date code lot code / trace number part number company name edi product numbering card access time 15 150ns 25 250ns temperature range c commercial 0c to +70c i industrial -40c to +85c packaging option 00 standard, type 1 card family and version ? see card family and version info. for details (next page) card capacity 512 512kb pc card p standard pcmcia r ruggedized pcmcia card technology 7 flash 8 sram 8 p 512 srv01 00 c 15
10 white electronic designs corporation ? (602) 437-1520 ? www.whiteedc.com white electronic designs srv01-srv04 february 2007 rev. 2 8p xxx srv yy ss t zz where xxx: 256* 256kb 512* 512kb 001 1mb 002 2mb 004 4mb 006 6mb 008* 8mb *= capacities available only in srv01-srv04 yy: 01 no attribute memory, no write protect switch 02 with attribute memory, no write protect switch 03 with write protect switch, no attribute memory 04 with attribute memory, with write protect switch 11 extended battery backup time, no attribute memory, no write protect switch 12 extended battery backup time, with attribute memory, no write protect switch 13 extended battery backup time, with write protect switch, no attribute memory 14 extended battery backup time, with attribute memory, with write protect switch ss: 00 wedc sram logo type i 01 blank housing, type i 02 blank housing, type i recessed 03 wedc sram logo, type ii (8mb and extended battery backup time) 04 blank housing, type ii (8mb and extended battery backup time) 05 blank housing, type ii recessed (8mb and extended battery backup time) t: c commercial i industrial zz: 15 150ns ordering information
11 white electronic designs corporation ? (602) 437-1520 ? www.whiteedc.com white electronic designs srv01-srv04 february 2007 rev. 2 document title pcmcia sram memory card ? srv series sram memory card 256kb through 8mb revision history rev # history release date status rev 0 initial release 9-27-99 rev 1 1.0 added page 8, added srv11-14 to page 9, changed page header 6-2-00 rev 2 2.0 updated data sheet title from "flash memory card" to "sram memory card" february 2007 final

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